kopia lustrzana https://github.com/F5OEO/rpidatv
Increased memory buffer for RF Mode
rodzic
7ae83c1e65
commit
6296f1cf28
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@ -333,7 +333,7 @@ pwm_reg[PWM_CTL] = 0;
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// Write a frequency sample
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// Write a frequency sample
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ /*| BCM2708_DMA_PER_MAP(5)*/;
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS /* BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(5)*/;
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cbp->src = mem_virt_to_phys(ctl->sample + samplecnt);
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cbp->src = mem_virt_to_phys(ctl->sample + samplecnt);
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cbp->dst = phys_pwm_fifo_addr;
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cbp->dst = phys_pwm_fifo_addr;
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cbp->length = 4;
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cbp->length = 4;
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@ -345,7 +345,7 @@ pwm_reg[PWM_CTL] = 0;
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// Delay
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// Delay
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cbp->info = /*BCM2708_DMA_SRC_IGNOR |*/ BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(2);
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cbp->info = BCM2708_DMA_SRC_IGNOR |/* BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |*/ BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(2);
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cbp->src = mem_virt_to_phys(virtbase);
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cbp->src = mem_virt_to_phys(virtbase);
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cbp->dst = phys_fifo_addr;//Delay with PCM
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cbp->dst = phys_fifo_addr;//Delay with PCM
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cbp->length = 4;
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cbp->length = 4;
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@ -705,7 +705,7 @@ int InitDTX1()
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//#define BIG_BUFFER_SIZE ((int)((NUM_SAMPLES*4*1.5)/188)*188)
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//#define BIG_BUFFER_SIZE ((int)((NUM_SAMPLES*4*1.5)/188)*188)
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#define BIG_BUFFER_SIZE (18800*8)
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#define BIG_BUFFER_SIZE (18800*8*2)
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#define BURST_MEM_SIZE (188)
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#define BURST_MEM_SIZE (188)
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typedef struct circular_buffer
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typedef struct circular_buffer
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{
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{
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@ -1246,12 +1246,14 @@ if(ModeIQ==2)
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pthread_create (&th1,NULL, &FillBigBuffer,NULL);
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pthread_create (&th1,NULL, &FillBigBuffer,NULL);
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pthread_attr_destroy (&attr);
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pthread_attr_destroy (&attr);
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if(FEC>0)
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while(BufferAvailable()<(BIG_BUFFER_SIZE*5/10)) // 1/10 SECOND BUFFERING DEPEND ON SYMBOLRATE OR 80% BUFFERSIZE
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{
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{
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//printf("Init Filling Memory buffer %d\n",BufferAvailable());
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while(BufferAvailable()<(BIG_BUFFER_SIZE*5/10)) // 1/10 SECOND BUFFERING DEPEND ON SYMBOLRATE OR 80% BUFFERSIZE
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//printf(".");
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{
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usleep(10000);
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//printf("Init Filling Memory buffer %d\n",BufferAvailable());
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//printf(".");
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usleep(10000);
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}
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}
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}
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/*
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/*
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int NbByteInitRead=0;
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int NbByteInitRead=0;
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@ -1352,7 +1354,7 @@ for (;;)
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free_slots=free_slots_now;
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free_slots=free_slots_now;
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// FIX IT : Max(freeslot et Numsample/8)
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// FIX IT : Max(freeslot et Numsample/8)
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if((Init==1)&&(free_slots <= 204*2*4 /*NUM_SAMPLES/8*/))
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if(((Init==1)&&(free_slots <= 204*2*4 /*NUM_SAMPLES/8*/))||(FEC==0))
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{
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{
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printf("%ld:%ld : End of Fulling buffer \n",gettime_now.tv_sec,gettime_now.tv_nsec);
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printf("%ld:%ld : End of Fulling buffer \n",gettime_now.tv_sec,gettime_now.tv_nsec);
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dma_reg[DMA_CS+DMA_CHANNEL*0x40] = 0x10880001; // go, mid priority, wait for outstanding writes :7 Seems Max Priority
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dma_reg[DMA_CS+DMA_CHANNEL*0x40] = 0x10880001; // go, mid priority, wait for outstanding writes :7 Seems Max Priority
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