kopia lustrzana https://github.com/F5OEO/librpitx
119 wiersze
3.1 KiB
C++
119 wiersze
3.1 KiB
C++
#ifndef DEF_DMA
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#define DEF_DMA
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#include "stdint.h"
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#include "gpio.h"
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#include "util.h"
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// ---- Memory allocating defines
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// https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
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#define MEM_FLAG_DISCARDABLE (1 << 0) /* can be resized to 0 at any time. Use for cached data */
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#define MEM_FLAG_NORMAL (0 << 2) /* normal allocating alias. Don't use from ARM */
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#define MEM_FLAG_DIRECT (1 << 2) /* 0xC alias uncached */
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#define MEM_FLAG_COHERENT (2 << 2) /* 0x8 alias. Non-allocating in L2 but coherent */
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#define MEM_FLAG_L1_NONALLOCATING (MEM_FLAG_DIRECT | MEM_FLAG_COHERENT) /* Allocating in L2 */
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#define MEM_FLAG_ZERO (1 << 4) /* initialise buffer to all zeros */
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#define MEM_FLAG_NO_INIT (1 << 5) /* don't initialise (default is initialise to all ones */
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#define MEM_FLAG_HINT_PERMALOCK (1 << 6) /* Likely to be locked for long periods of time. */
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#define BCM2708_DMA_SRC_IGNOR (1 << 11)
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#define BCM2708_DMA_SRC_INC (1 << 8)
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#define BCM2708_DMA_DST_IGNOR (1 << 7)
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#define BCM2708_DMA_NO_WIDE_BURSTS (1 << 26)
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#define BCM2708_DMA_WAIT_RESP (1 << 3)
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#define BCM2708_DMA_D_DREQ (1 << 6)
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#define BCM2708_DMA_PER_MAP(x) ((x) << 16)
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#define BCM2708_DMA_END (1 << 1)
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#define BCM2708_DMA_RESET (1 << 31)
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#define BCM2708_DMA_INT (1 << 2)
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#define DMA_CS (0x00 / 4)
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#define DMA_CONBLK_AD (0x04 / 4)
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#define DMA_DEBUG (0x20 / 4)
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//Page 61
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#define DREQ_PCM_TX 2
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#define DREQ_PCM_RX 3
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#define DREQ_SMI 4
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#define DREQ_PWM 5
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#define DREQ_SPI_TX 6
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#define DREQ_SPI_RX 7
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#define DREQ_SPI_SLAVE_TX 8
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#define DREQ_SPI_SLAVE_RX 9
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class dma
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{
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protected:
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struct
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{
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int handle; /* From mbox_open() */
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unsigned mem_ref; /* From mem_alloc() */
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unsigned bus_addr; /* From mem_lock() */
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uint8_t *virt_addr; /* From mapmem() */
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} mbox;
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typedef struct
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{
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uint32_t info, src, dst, length,
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stride, next, pad[2];
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} dma_cb_t; //8*4=32 bytes
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typedef struct
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{
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uint8_t *virtaddr;
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uint32_t physaddr;
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} page_map_t;
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page_map_t *page_map;
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uint8_t *virtbase;
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int NumPages = 0;
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int channel; //DMA Channel
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dmagpio dma_reg;
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uint32_t mem_flag; //Cache or not depending on Rpi1 or 2/3
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uint32_t dram_phys_base;
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public:
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dma_cb_t *cbarray;
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uint32_t cbsize;
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uint32_t *usermem;
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uint32_t usermemsize;
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bool Started = false;
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dma(int Channel, uint32_t CBSize, uint32_t UserMemSize);
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~dma();
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uint32_t mem_virt_to_phys(volatile void *virt);
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uint32_t mem_phys_to_virt(volatile uint32_t phys);
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void GetRpiInfo();
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int start();
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int stop();
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int getcbposition();
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bool isrunning();
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bool isunderflow();
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bool SetCB(dma_cb_t *cbp, uint32_t dma_flag, uint32_t src, uint32_t dst, uint32_t repeat);
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bool SetEasyCB(dma_cb_t *cbp, uint32_t index, dma_common_reg dst, uint32_t repeat);
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};
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class bufferdma : public dma
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{
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protected:
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uint32_t current_sample;
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uint32_t last_sample;
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uint32_t sample_available;
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public:
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uint32_t buffersize;
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uint32_t cbbysample;
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uint32_t registerbysample;
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uint32_t *sampletab;
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public:
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bufferdma(int Channel, uint32_t tbuffersize, uint32_t tcbbysample, uint32_t tregisterbysample);
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void SetDmaAlgo();
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int GetBufferAvailable();
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int GetUserMemIndex();
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int PushSample(int Index);
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};
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#endif
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