From ba34a8fae5cbd1e733b64eab6683b43344124db4 Mon Sep 17 00:00:00 2001 From: pe1nnz Date: Thu, 21 Mar 2013 10:25:45 +0000 Subject: [PATCH] calibration of PLL clock --- wspr | Bin 17852 -> 17852 bytes wspr.c | 5 ++--- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/wspr b/wspr index b1a2561a85b8ce1333039beb76767d7f5adf20ec..fd82320f32a4785bda3f5dfeeadbb773fc8ee33c 100755 GIT binary patch delta 142 zcmdnf&A6wVaYF;6h)|Yh<^BfcBY)4hKAd$p(xNg?w|?^!#uz?M4TkwoIsg5Ctupy1 zzqHIRAdBUK_alamy)W)8XJBB^XJlaT(0$3Wq4&{d1Az@ptoynChdkf>RH&VqQDbwi qn7gu|!UUi?FyLcg0n!?qk6QXOvuXf^1vX3C>N7LCZ1!|0W(5FycQVBQ delta 142 zcmdnf&A6wVaYF;6NU_eQ&T<9@27N{b1`pkrEE{?seF3W2Y#^|KiPdQN)2gqVp9-}zGpcOP q6?0b>l$iij3kG})EI?Xi^HEEGW>yuTu*hafTYY9mhs~Z2#jF5isWTM- diff --git a/wspr.c b/wspr.c index 1f9cb57..9fc0a18 100644 --- a/wspr.c +++ b/wspr.c @@ -105,7 +105,7 @@ void go_wspr(void); // start WSPR beacon mode void go_wspr_tx(void); // set cube in wspr tx mode #define CAL_PWM_CLK (31500000 * 1.078431372549019607843137254902) // calibrated PWM clock -#define CAL_PLL_CLK (500000000.0 * 0.99994290179416484635001314707972) // calibrated PLL reference clock +#define CAL_PLL_CLK (500000000.0 * 0.99993565799251550864072437977875) // calibrated PLL reference clock #define WSPR_SYMTIME (8192.0/12000.0) // symbol time #define WSPR_OFFSET (1.0/WSPR_SYMTIME) // tone separation @@ -289,11 +289,10 @@ void unSetupDMA(){ printf("exiting\n"); struct DMAregs* DMA0 = (struct DMAregs*)&(ACCESS(DMABASE)); DMA0->CS =1<<31; // reset dma controller - + txoff(); } void handSig() { - txoff(); exit(0); } void setupDMATab( float centerFreq, double symOffset ){